Startup Promises 100x Faster Embedded Computing

A New Era of Energy-Efficient Computing

The demand for CPUs that can operate in challenging environments is on the rise. These processors need to function reliably in hard-to-reach locations while running on limited power sources or scavenged energy. Frustrated by the inefficiencies of traditional ultralow-power microprocessors, the founders of Efficient Computer set out to design a new kind of general-purpose processor that prioritizes energy efficiency.

“We’re creating something that has the capabilities of a CPU but is one or two orders of magnitude more efficient,” says co-founder Brandon Lucia. The result is the Electron E1 and its accompanying compiler, now being made available to developers and early partners. According to Lucia, the C-programmable processor delivers between 10 and 100 times better efficiency than commercial ultralow-power CPUs when handling typical embedded tasks like performing fast Fourier transforms on sensor data or executing convolutions for machine learning.

Redefining Processor Architecture

The key innovation behind the Electron E1 lies in its architecture. Unlike traditional processors that follow the von Neumann model—where instructions are fetched sequentially from memory—the E1 maps out program instructions spatially across a chip. This approach allows data to flow through a network of “tiles,” each acting as a simplified processor core.

This spatial layout eliminates many of the overheads associated with conventional architectures. Modern CPUs often have to predict the next instruction to avoid stalling, which requires complex logic and additional energy. The E1’s design avoids this by structuring the chip so that data moves directly from one tile to another in the correct sequence, minimizing unnecessary operations.

A Fabric for Dataflow

The E1’s compiler, called effcc Compiler, plays a crucial role in this process. It reads programs written in C or other common languages and assigns each instruction to a specific tile. The compiler then configures the network of tiles so that data flows seamlessly through the system, processing information step by step.

When a program encounters branching logic, such as an if/then/else statement, the spatial pattern of tiles adjusts accordingly. “It’s like a switch track in a railroad,” explains Lucia. This flexibility allows the E1 to handle complex programming structures without sacrificing efficiency.

Beyond Traditional Dataflow Architectures

While other companies have explored dataflow architectures, such as Google’s TPUs and Amazon’s Inferentia chips, these designs are typically limited to specific types of data paths. The E1, however, supports arbitrary data paths, including complex loops like while loops. These loops require feedback mechanisms, which are notoriously difficult to implement in dataflow systems.

Lucia notes that solving this challenge took years of research and development. “A lot of other dataflow architectures don’t support general-purpose computing because they couldn’t crack that nut,” he says. The E1’s fabric enables general-purpose computing by allowing values to circulate through feedback paths efficiently.

Performance and Efficiency

According to Efficient Computer, the E1 consumes less energy than two competing ARM processors at three critical tasks: matrix multiplication for machine learning, fast Fourier transform, and convolution for computer vision. This makes it a compelling option for applications where power consumption is a major concern.

Expert Perspectives

Todd Austin, a professor of computer science and engineering at the University of Michigan, highlights that the E1 exemplifies an efficient architecture by minimizing non-computational elements like instruction fetching and data storage. Rakesh Kumar, a computer architect at the University of Illinois Urbana-Champaign, praises the team’s work but warns that the startup will face challenges in the market. “Ultralow power companies have had a hard time because of strong competition in low-power, very cheap microcontrollers,” he says. “The key challenge is identifying a new capability and getting customers to pay for it.”

As the E1 makes its way into the hands of developers, it represents a significant step forward in the quest for energy-efficient computing. Its unique architecture and performance advantages could pave the way for a new generation of processors designed for the edge.